芯片電磁仿真解決方案
EM Simulation for ICs
介紹
Introduction
法動科技芯片級的電磁仿真軟件UltraEM?采用領先的三維全波電磁仿真技術，用于分析射頻/微波IC及高速數(shù)字IC版圖的電磁場效應，并與業(yè)界領先的模擬芯片設計環(huán)境進行無縫集成，為廣大的設計人員提供高精度電磁分析服務。本案例展示5G帶通濾波器芯片的仿真流程，該濾波器工作頻率3.3GHz-4.2GHz，中心頻率為3.8GHz，通帶最大衰減為-2dB。
UltraEM?, the 3D Full-wave EM Simulation software from Faraday Dynamics, Ltd., is designed to analyze the electromagnetic field effects of RF/microwave IC and high-speed digital IC layouts. It can be seamlessly integrated with the industry's leading analog chip design environments to provide high-precision electromagnetic analysis services for designers. This reference case demonstrates the simulation task of a 5G bandpass filter design using a gallium arsenide process, that operates at a frequency range from 3.3GHz to 4.2GHz, a center frequency of 3.8GHz, and a maximum passband attenuation of -2dB.
設計流程
Design Flow
仿真結果
Simulation Results
仿真結果與實測數(shù)據(jù)對比顯示，該帶通濾波器在3.3-4.2GHz的工作頻段內(nèi)的衰減不大于-2dB，端口之間的耦合小于-10dB，且頻偏小于0.1GHz。
The simulation results and the measured results are compared in the above figure. It shows that the attenuation of the filter within the operating frequency band of 3.3-4.2GHz is not more than -2dB, the coupling between ports is less than -10dB, and the frequency offset is less than 0.1GHz.
EDA軟件
EDA Tools
介紹
Introduction
法動科技針對封裝和PCB級的電磁仿真軟件SuperEM?采用領先的三維全波電磁仿真技術，用于分析高速PCB和IC封裝的電磁場效應，并與業(yè)界領先的模擬芯片設計環(huán)境進行無縫整合，為廣大的設計人員提供高精度電磁分析服務，以黃金標準精度應對更復雜的電磁（EM）挑戰(zhàn)，本案例將展示QFN（方形扁平無引腳封裝）的S參數(shù)仿真流程以供參考。
The simulation results and the measured results are compared in the above figure. It shows that the attenuation of the filter within the operating frequency band of 3.3-4.2GHz is not more than -2dB, the coupling between ports is less than -10dB, and the frequency offset is less than 0.1GHz. SuperEM?, the package and PCB EM simulation software from Faraday Dynamics, Ltd. adopts the most advanced 3D full-wave EM simulation technology for analyzing the electromagnetic field effects of high-speed IC packages and PCBs. It can be seamlessly integrated with the industry's leading package and PCB design environments to provide high precision EM analysis services to attack very complex EM challenges with gold-standard precision. This reference case demonstrates the SuperEM? S-parameter simulation task of a Quad Flat No-leads (QFN) design.
設計流程
Design Flow
仿真結果
Simulation Results
本案例介紹了采用法動科技的SuperEM?三維全波電磁軟件對QFN模型的仿真。SuperEM?易于上手的界面實現(xiàn)了工藝配置、模型導入、端口創(chuàng)建等功能，快速完成模型的建模和仿真，可滿足用戶對封裝進行快速建模仿真的應用場景需求。
This example case demonstrates the simulation of a QFN packaging model using SuperEM?. SuperEM? provides a user-friendly interface for process parameters configuration, layout import, port creation, etc. It can satisfy user's needs for rapid modeling and simulation of packaging design scenarios.
EDA軟件
EDA Tools
介紹
Introduction
芯片設計與封裝設計傳統(tǒng)上是由各自工程團隊獨立完成，這樣做的缺陷是增加了迭代時間和溝通成本。法動科技獨創(chuàng)芯片-封裝聯(lián)合仿真流程，三維建模簡單易用，并配有專門針對聯(lián)合仿真的優(yōu)化求解器，不僅可大幅減少迭代次數(shù)，提高設計成功率，而且能使芯片工程師在設計流程中隨時評估封裝性能。本案例展示5G帶通濾波器芯片-封裝聯(lián)合仿真流程，該濾波器工作頻率為3.3GHz-4.2GHz，中心頻率為3.8GHz。
Traditionally, chip design and package design are developed separately by different engineering teams. It imposes considerable iteration time and high communication costs. Faraday Dynamics? has developed a unique chip and package co-simulation flow. It provides easy-to-use 3D modeling capability and a specially designed simulation solver for co-simulation, which can reduce the number of iterations; improve the design success rate; and enable chip engineers to assess the package performance at any time during the design process. This reference case demonstrates the co-simulation task of a 5G bandpass filter design using a gallium arsenide process that operates at a frequency range from 3.3GHz to 4.2GHz, a center frequency of 3.8GHz.
設計流程
Design Flow
仿真結果
Simulation Results
芯片與芯片-封裝回波損耗與插入損耗的結果對比
Comparison of Chip-Only vs. Chip-Package Return Loss and Insertion Loss Results
分別仿真了芯片不帶封裝和帶封裝兩種應用場景，來分析封裝對芯片濾波特性的影響。添加封裝后濾波器中心頻率及通帶并沒明顯變化，通帶最大衰減由原來的-2dB變?yōu)榱?4dB。得出結論: 封裝效應是芯片設計不得不考慮的重要因素。我們需要通過封裝聯(lián)合仿真的結果調整芯片版圖以達到目標結果。
The chip-only and chip-with-package scenarios are simulated to analyze the effect of the package on the filter. The comparison of results shows that the chip-with-package center frequency and passband characteristics are almost the same as the chip-only case. However, the chip-with package passband maximum attenuation has changed from -2dB to -4dB. With the co-simulation, we can conclude that further chip design refinement must be done to meet the original design target.
EDA軟件
EDA Tools
介紹
Introduction
貼片天線擁有小型化、低剖面、高增益、易安裝、以及低成本等特點。由貼片天線構成的大規(guī)模陣列在毫米波基站、衛(wèi)星通信、汽車雷達、以及工業(yè)物聯(lián)網(wǎng)等無線通信系統(tǒng)中得到廣泛應用。SuperEM?可適用于任何貼片天線陣列的完整設計流程，包括從仿真到調試的各個環(huán)節(jié)。它可以精確地仿真S參數(shù)、近場、以及輻射方向圖等數(shù)據(jù)。本案例展示了一個4×4的貼片天線陣列，單元間隔為半波長，工作頻率為3.5GHz，仿真結果數(shù)據(jù)從SuperEM?導出。
Patch antennas possess merits such as miniaturization, low profile, high gain, easy installation, and low cost. Large-scale arrays composed of patch antennas find extensive applications in wireless communication systems, including millimeter-wave base stations, satellite communications, automotive radar, and industrial IoT. SuperEM? is applicable to the comprehensive design process of any type of patch antenna arrays, covering various stages from simulation to optimization. It accurately simulates data such as S-parameters, near field, and radiation patterns. This case study presents a 4×4 patch antenna array with a unit spacing of half wavelength, operating at 3.5GHz, and the simulation results are exported from SuperEM?.
設計流程
Design Flow
仿真結果
Simulation Results
SuperEM?使用FCell模型構建天線單元，只需一次設計，即可用于各種不同板材和尺寸的模型。仿真結果顯示，該天線在3.5GHz頻段的回波損耗小于10dB，端口之間的耦合小于15dB，且在60度內(nèi)的掃描增益為14-15dBi，性能優(yōu)異，適用于大規(guī)模波束掃描陣列。
Utilizing the FCell model from one time design, SuperEM? facilitates antenna unit construction, applicable to v arious materials and dimensions. The simulations demonstrate that the antenna array exhibits a return loss of less than 10dB in the 3.5GHz frequency range, coupling between ports is below 15dB, and the scanning gain within 60-degree ranges from 14-15dBi. The performance is exceptional, making it suitable for large scale beam-scanning arrays.
EDA軟件
EDA Tools
介紹
Introduction
EMOptimizer?是法動科技的射頻電路快速設計優(yōu)化軟件。同時EMOptimizer?也是業(yè)界首款射頻電路快速設計優(yōu)化軟件，該軟件將FCell 用于電路設計，在保證較高精度的同時，大大提升電路仿真和優(yōu)化的速度。本參考案例演示了設計優(yōu)化一個帶通濾波器，通帶：2.6GHz-3.2GHz，插入損耗：1.1dB，回波損耗：17dB，衰減：20dB@1.9GHz-2.3GHz，35dB@1.4GHz-1.8GHz，20dB@3.8GHz-4.2GHz，18dB@4.5GHz-6.5GHz。
Powered by the FCell modeling technology, EMOptimizer? (which is industry’s first rapid tool for design and optimization of RF circuits developed by Faraday Dynamics) unleashes unpreceded speed for RF circuit design and optimization, empowering RF design engineers to accomplish their designs much faster than ever before. This reference design case demonstrates design and optimization of a bandpass filter. EMOptimizer? optimizes the filter’s design parameters to achieve a passband of 2.6GHz-3.2GHz with insertion loss (1.1dB) and return loss (17dB). Furthermore, the final filter delivers sharp attenuation in stopbands, 20dB@1.9GHz-2.3GHz, 35dB@1.4GHz-1.8GHz, 20dB@3.8GHz-4.2GHz, and 1.8dB@4.5GHz-6.5GHz.
設計流程
Design Flow
仿真結果
Simulation Results
上圖是設計的濾波器經(jīng)過EMOptimizer?優(yōu)化前后的仿真結果圖。經(jīng)過優(yōu)化后通帶由2.85GHz-3.1GHz增加到2.7GHz-3.1GHz，插入損耗減小0.8dB，回波損耗增加9dB。
The figure depicts the simulation results of the designed filter before and after EMOptimizer? performs optimization. After optimization, the passband increases from 2.85GHz-3.1GHz to 2.7GHz-3.1GHz, the insertion loss is reduced by 0.8 dB, and the return loss increases by 9 dB。
將EMOptimizer?優(yōu)化得到的版圖輸出到電磁仿真軟件UltraEM?。經(jīng)電磁仿真驗證可見結果達到了設計規(guī)格要求。
The optimized layout obtained from EMOptimizer? is exported to UltraEM? for rigorous EM simulation and verification. The EM simulation validates that the final layout design meets the design specifications.
EDA軟件
EDA Tools
介紹
Introduction
信號完整性用于評估信號在封裝及電路板中的傳輸和反射情況，以確保信號質量在正常范圍內(nèi)。仿真通常包括時域仿真和頻域仿真，前者可用于評估傳輸線上的波形和反射，后者可用于評估信號的頻率響應和帶寬。電源完整性仿真是對電源系統(tǒng)的設計進行分析和優(yōu)化的過程，主要用于評估電源噪聲和電源干擾對電路性能的影響，從而優(yōu)化電源設計。法動科技采用領先的三維全波電磁仿真技術和頻域/時域電路仿真算法，可以幫助工程師進行仿真分析，優(yōu)化封裝及電路板設計，并與業(yè)界領先的封裝及電路板設計環(huán)境進行無縫集成，為廣大的設計人員提供高精度分析服務。
Signal Integrity (SI) analysis evaluates the transmission and reflection of signals in packages and circuit boards to ensure that the signal quality is within normal limits. SI analysis typically includes time domain simulation, which is used to evaluate waveforms and reflections on transmission lines, and frequency domain simulation, which is used to evaluate the frequency response and bandwidth of signals. Power Integrity (PI) analysis evaluates the impact of power supply noise and power supply interference on circuit performance for power supply design optimization. Faraday Dynamics offers cutting-edge 3D full-wave electromagnetic simulation technology and frequency-/time-domain circuit simulation algorithms for engineers to perform simulation analysis and optimize package and PCB design. They seamlessly integrate with the industry's leading package and board design environments to provide high-precision analysis services to a wide range of designers.
設計流程
Design Flow
仿真結果
Simulation Results
本案例介紹了采用法動科技的SuperEM?對封裝及電路板中的信號線仿真電磁特性、提取參數(shù)，使用FDSPICE?進行時域仿真的流程。軟件界面易于上手，可快速完成建模仿真，可滿足用戶對設計進行信號完整性分析的需求。
This case describes the flow of simulating electromagnetic characteristics and extracting parameters of signal lines in packages and circuit boards by using SuperEM? from Faraday Dynamics, and the flow of time-domain simulation by using FDSPICE?. The software interface is easy to use and can quickly complete the modeling and simulation, which can meet the user's needs for signal integrity analysis of the design.
眼圖結果
Eye Diagram Result in Inter-code Crosstalk
IR Drop
IR Drop
本案例介紹了采用法動科技SuperEM?對PCB中的電源和地網(wǎng)絡仿真IR Drop的流程。軟件與業(yè)界領先的PCB設計環(huán)境進行無縫集成，可以快速讀取設計數(shù)據(jù)，并進行設置仿真，可滿足用戶進行IR Drop分析的需求。
This case describes the flow of IR Drop simulation of power and ground networks in PCBs using SuperEM?. The software seamlessly integrates with industry-leading PCB design environments to quickly read design data and set up simulations that can meet users' needs for IR Drop analysis.
仿真版圖
Example for IR Drop
電壓分布圖
Voltage Distribution Map
電流密度分布圖
Current Density Distribution Map
功率損耗密度分布圖
Power Loss Density Distribution Map
EDA軟件
EDA Tools
介紹
Introduction
模擬射頻芯片設計通常遵循一系列嚴格的步驟，包括規(guī)格制定、電路設計、仿真和優(yōu)化、布局設計、物理驗證等。芯片設計工程師需要使用專業(yè)仿真工具和器件模型，以確保設計滿足性能和可靠性要求。本案例使用法動科技的EDA解決方案完成一個代表性的功率放大器設計。
Analog/RF chip design usually follows a series of rigorous steps,including specifications, circuit design, simulation and optimization,layout design, physical verification, etc. Chip design engineers need to use professional simulation tools and device models to ensure that the design meets performance and reliability requirements.Herein, a typical Ku-band power amplifier design, as a design example, is accomplished using a design flow from Faraday Dynamics, Ltd.
設計流程
Design Flow
仿真結果
Simulation Results
S-parameters
Pout
Pin
EDA軟件
EDA Tools
介紹
Introduction
天線阻抗匹配是將天線的阻抗與信號源的輸出阻抗或接收設備的輸入阻抗協(xié)調一致，以達到信號的最佳傳輸狀態(tài)的過程。對于發(fā)射天線而言，阻抗不匹配可能導致信號發(fā)射功率下降、發(fā)送距離減短，同時還可能損害天線組件，而對于接收天線而言，阻抗不匹配則會導致接收靈敏度降低，同時引入噪聲干擾，從而影響接收信號的質量。因此，在確保良好通信性能的過程中，阻抗匹配成為至關重要的環(huán)節(jié)。
Antenna impedance matching involves aligning the impedance of the antenna with either the output impedance of the signal source or the input impedance of the receiving equipment to facilitate optimal signal transmission. Inadequate impedance matching in the transmitting antenna can result in reduced signal transmission power, shortened transmission distances, and potential damage to antenna components. Conversely, in the receiving antenna, impedance mismatch may diminish reception sensitivity and introduce noise interference, thereby compromising the quality of the received signal. Consequently, impedance matching emerges as a pivotal element in ensuring effective communication performance.
設計流程
Design Flow
仿真結果
Simulation Results
FDSPICE?將SuperEM?中仿真得到的S參數(shù)結果導入為S Model，再進行電路圖搭建以及優(yōu)化。可以快速得到所需R、L、C的初始值，大大降低了版圖仿真的參數(shù)掃描范圍，減少了整個天線匹配網(wǎng)絡設計流程的時間。
FDSPICE? imports S-parameter acquired from simulations conducted in SuperEM? into S Model, facilitating the construction and optimization of the circuit diagram. This approach enables rapid acquisition of initial values for R, L, and C, significantly narrowing the parameter scanning range in layout simulations and reducing the overall time required for antenna matching network design.
EDA軟件
EDA Tools